Working set size for traces

For this week, I modified the simulation to work for on an L1, L2, and L3 data cache, instead of just the L1 cache. After doing some research, I found the typical size and associativity of these caches in an i7 processor. After simulating this, I found that the traces were all resident in the cache. This means that there was no recaching in the L3 cache. To determine a good cache configuration moving forward, it will be useful to know the working set size, which is the amount of memory needed by the trace.